Spiking neural networks (SNNs) are a computational tool in which the information is coded into spikes, as in some parts of the brain, differently from conventional neural networks (NNs) that compute over real-numbers. Therefore, SNNs can implement intelligent information extraction in real-time at the edge of data acquisition and correspond to a complementary solution to conventional NNs working for cloud-computing. Both NN classes face hardware constraints due to limited computing parallelism and separation of logic and memory. Emerging memory devices, like resistive switching memories, phase change memories, or memristive devices in general are strong candidates to remove these hurdles for NN applications. The well-established training procedures of conventional NNs helped in defining the desiderata for memristive device dynamics implementing synaptic units. The generally agreed requirements are a linear evolution of memristive conductance upon stimulation with train of identical pulses and a symmetric conductance change for conductance increase and decrease. Conversely, little work has been done to understand the main properties of memristive devices supporting efficient SNN operation. The reason lies in the lack of a background theory for their training. As a consequence, requirements for NNs have been taken as a reference to develop memristive devices for SNNs. In the present work, we show that, for efficient CMOS/memristive SNNs, the requirements for synaptic memristive dynamics are very different from the needs of a conventional NN. System-level simulations of a SNN trained to classify hand-written digit images through a spike timing dependent plasticity protocol are performed considering various linear and non-linear plausible synaptic memristive dynamics. We consider memristive dynamics bounded by artificial hard conductance values and limited by the natural dynamics evolution toward asymptotic values (soft-boundaries). We quantitatively analyze the impact of resolution and non-linearity properties of the synapses on the network training and classification performance. Finally, we demonstrate that the non-linear synapses with hard boundary values enable higher classification performance and realize the best trade-off between classification accuracy and required training time. With reference to the obtained results, we discuss how memristive devices with non-linear dynamics constitute a technologically convenient solution for the development of on-line SNN training.

Spiking neural networks (SNNs) employing memristive synapses are capable of life-long online learning. Because of their ability to process and classify large amounts of data in real-time using compact and low-power electronic systems, they promise a substantial technology breakthrough. However, the critical issue that memristor-based SNNs have to face is the fundamental limitation in their memory capacity due to finite resolution of the synaptic elements, which leads to the replacement of old memories with new ones and to a finite memory lifetime. In this study we demonstrate that the nonlinear conductance dynamics of memristive devices can be exploited to improve the memory lifetime of a network. The network is simulated on the basis of a spiking neuron model of mixed-signal digital-analogue sub-threshold neuromorphic CMOS circuits, and on memristive synapse models derived from the experimental nonlinear conductance dynamics of resistive memory devices when stimulated by trains of identical pulses. The network learning circuits implement a spike-based plasticity rule compatible with both spike-timing and rate-based learning rules. In order to get an insight on the memory lifetime of the network, we analyse the learning dynamics in the context of a classical benchmark of neural network learning, that is hand-written digit classification. In the proposed architecture, the memory lifetime and the performance of the network are improved for memristive synapses with nonlinear dynamics with respect to linear synapses with similar resolution. These results demonstrate the importance of following holistic approaches that combine the study of theoretical learning models with the development of neuromorphic CMOS SNNs with memristive devices used to implement life-long on-chip learning.

Random telegraph noise is a widely investigated phenomenon affecting the reliability of the reading operation of the class of memristive devices whose operation relies on formation and dissolution of conductive filaments. The trap and the release of electrons into and from defects surrounding the filament produce current fluctuations at low read voltages. In this work, telegraphic resistance variations are intentionally stimulated through pulse trains in HfO -based memristive devices. The stimulated noise results from the re-arrangement of ionic defects constituting the filament responsible for the switching. Therefore, the stimulated noise has an ionic origin in contrast to the electronic nature of conventional telegraph noise. The stimulated noise is interpreted as raising from a dynamic equilibrium establishing from the tendencies of ionic drift and diffusion acting on the edges of conductive filament. We present a model that accounts for the observed increase of noise amplitude with the average device resistance. This work provides the demonstration and the physical foundation for the intentional stimulation of ionic telegraph noise which, on one hand, affects the programming operations performed with trains of identical pulses, as for neuromorphic computing, and on the other hand, it can open opportunities for applications relying on stochastic processes in nanoscaled devices.

The development of devices that can modulate their conductance under the application of electrical stimuli constitutes a fundamental step towards the realization of synaptic connectivity in neural networks. Optimization of synaptic functionality requires the understanding of the analogue conductance update under different programming conditions. Moreover, properties of physical devices such as bounded conductance values and state-dependent modulation should be considered as they affect storage capacity and performance of the network. This work provides a study of the conductance dynamics produced by identical pulses as a function of the programming parameters in an HfO memristive device. The application of a phenomenological model that considers a soft approach to the conductance boundaries allows the identification of different operation regimes and to quantify conductance modulation in the analogue region. Device non-linear switching kinetics is recognized as the physical origin of the transition between different dynamics and motivates the crucial trade-off between degree of analog modulation and memory window. Different kinetics for the processes of conductance increase and decrease account for device programming asymmetry. The identification of programming trade-off together with an evaluation of device variations provide a guideline for the optimization of the analogue programming in view of hardware implementation of neural networks.

Memory stacks for charge trapping cells have been produced exploiting Al-doped Hfo(2), AL(2)O(3), and SiO2 made by atomic layer deposition. The fabricated stacks show superior stability and electrical characteristics, allowing for the engineering of sub-1 nm equivalent oxide thickness Al doped HfO2 trapping layer with excellent retention characteristics, also at high temperature. The low Al doping content (4.5%) used in this work leads to the HfO2 crystallization, upon thermal annealing, in the cubic/tetragonal phase with a dielectric constant value of 32. The trapping properties of the proposed stacks have been studied by means of physics-based models, highlighting the role of the different layers and the nature of the traps contributing to the charge storage in the memory stack.

Emerging non-volatile memory technologies are promising due to their anticipated capacity benefits, non-volatility, and zero idle energy. One of the most promising candidates is resistive random access memory (RRAM) based on resistive switching (RS). This paper reviews the development of RS device technology including the fundamental physics, material engineering, three-dimension (3D) integration, and bottom-up fabrication. The device operation, physical mechanisms for resistive switching, reliability metrics, and memory cell selector candidates are summarized from the recent advancement in both industry and academia. Options for 3D memory array architectures are presented for the mass storage application. Finally, the potential application of bottom-up fabrication approaches for effective manufacturing is introduced.

Resistance switching devices, whose operation is driven by formation (SET) and dissolution (RESET) of conductive paths shorting and disconnecting the two metal electrodes, have recently received great attention and a deep general comprehension of their operation has been achieved. However, the link between switching characteristics and material properties is still quite weak. In particular, doping of the switching oxide layer has often been investigated only for looking at performance upgrade and rarely for a meticulous investigation of the switching mechanism. In this paper, the impact of Al doping of HfO devices on their switching operations, retention loss mechanisms and random telegraph noise traces is investigated. In addition, phenomenological modeling of the switching operation is performed for device employing both undoped and doped HfO. We demonstrate that Al doping influences the filament disruption process during the RESET operation and, in particular, it contributes in preventing an efficient restoration of the oxide with respect to undoped devices.

Emerging brain-inspired architectures call for devices that can emulate the functionality of biological synapses in order to implement new efficient computational schemes able to solve ill-posed problems. Various devices and solutions are still under investigation and, in this respect, a challenge is opened to the researchers in the field. Indeed, the optimal candidate is a device able to reproduce the complete functionality of a synapse, i.e., the typical synaptic process underlying learning in biological systems (activity-dependent synaptic plasticity). This implies a device able to change its resistance (synaptic strength, or weight) upon proper electrical stimuli (synaptic activity) and showing several stable resistive states throughout its dynamic range (analog behavior). Moreover, it should be able to perform spike timing dependent plasticity (STDP), an associative homosynaptic plasticity learning rule based on the delay time between the two firing neurons the synapse is connected to. This rule is a fundamental learning protocol in state-of-art networks, because it allows unsupervised learning. Notwithstanding this fact, STDP-based unsupervised learning has been proposed several times mainly for binary synapses rather than multilevel synapses composed of many binary memristors. This paper proposes an HfO2-based analog memristor as a synaptic element which performs STDP within a small spiking neuromorphic network operating unsupervised learning for character recognition. The trained network is able to recognize five characters even in case incomplete or noisy images are displayed and it is robust to a device-to-device variability of up to ±30%.

The resistance switching dynamics of TiN/HfO/Pt devices is analyzed in this paper. When biased with a voltage ramp of appropriate polarity, the devices experience SET transitions from high to low resistance states in an abrupt manner, which allows identifying a threshold voltage. However, we find that the stimulation with trains of identical pulses at voltages near the threshold results in a gradual SET transition, whereby the resistive state visits a continuum of intermediate levels as it approaches some low resistance state limit. On the contrary, RESET transitions from low to high resistance states proceed in a gradual way under voltage ramp stimulation, while gradual resistance changes driven by trains of identical spikes cover only a limited resistance window. The results are discussed in terms of the relations among the thermo-electrochemical effects of Joule heating, ion mobility, and resistance change, which provide positive and negative closed loop processes in SET and RESET, respectively. Furthermore, the effect of the competition between opposite tendencies of filament dissolution and formation at opposite metal/HfO interfaces is discussed as an additional ingredient affecting the switching dynamics.

Resistive random access memories (REAM) are one of the main constituents of (he class of memristive technologies that arc today considered very promising in semiconductor industry because of their high potential for several applications ranging from nonv olatile memories to neuromorphic hardware. The latter application is particularly interesting, since bio-inspired electronic systems have the ability to treat ill-posed problems with higher efficiency than conventional computing paradigms. In this work, we focus on IflOzb ased RRAM devices and we analyse their switching dynamics in order to reach neuromorphic requirements. We present analogue memristive behaviour in Hf02 RRAM, which allows realizing a simple version of spike timing dependent plasticity learning rule. Finally, the experimental data are used to simulate an unsupervised spiking neuromorphic network for pattern recognition suitable for real-time applications.

Sequential infiltration synthesis (SIS) provides an original strategy to grow inorganic materials by infiltrating gaseous precursors in polymeric films. Combined with microphase-separated nanostructures resulting from block copolymer (BCP) self-assembly, SIS selectively binds the precursors to only one domain, mimicking the morphology of the original BCP template. This methodology represents a smart solution for the fabrication of inorganic nanostructures starting from self-assembled BCP thin films, in view of advanced lithographic application and of functional nanostructure synthesis. The SIS process using trimethylaluminum (TMA) and HO precursors in self-assembled PS-b-PMMA BCP thin films was established as a model system, where the PMMA phase is selectively infiltrated. However, the temperature range allowed by polymeric material restricts the available precursors to highly reactive reagents, such as TMA. In order to extend the SIS methodology and access a wide library of materials, a crucial step is the implementation of processes using reactive reagents that are fully compatible with the initial polymeric template. This work reports a comprehensive morphological (SEM, SE, AFM) and physicochemical (XPS) investigation of alumina nanostructures synthesized by means of a SIS process using O as oxygen precursor in self-assembled PS-b-PMMA thin films with lamellar morphology. The comparison with the HO-based SIS process validates the possibility to use O as oxygen precursor, expanding the possible range of precursors for the fabrication of inorganic nanostructures.

The multiple resistive switching of Pt/HfO2/TiN devices is demonstrated as a result of a competition between the switching at opposite metal/oxide interfaces. Three switching operation modes are demonstrated: clockwise (CW) switching (set for negative voltage and reset for positive voltage at Pt electrode), as already reported in literature for similar material stacks; counterclockwise (CCW) switching and complementary switching (CS) that consist in a set and a reset for increasing voltage of the same polarity. The multiple switching operation modes are enabled by a deep-reset operation that brings the cell resistance close to the initial one. As a consequence, the set transition after a deep-reset occurs at the same voltage and currents as those of the forming and leads to a low resistance state whose resistance can be further decreased in a CCW switching or increased back with a CW switching. With a suitable choice of the stop voltage, a CS in obtained, as well. The coexistence of all three CW, CCW, and CS operations demonstrates that both metal-oxide interfaces are active in the formation and the dissolution of conductive filaments responsible for the switching. All these observations are discussed in terms of a competition between ion migration processes occurring at the opposite metal-oxide interfaces. (C) 2015 AIP Publishing LLC.

Resistive switching devices were at first conceived to be used in memory applications. Recently, they have also been studied as artificial synapses for neuromorphic applications. Therefore, lots of efforts are currently devoted to optimise both materials and programming techniques to design a device able to emulate the behaviour of biological synapses, i.e. able to gradually increase and decrease its conductance when proper electrical signals are applied. In this paper, an Al:HfO2 based memristor is presented as a suitable device as an artificial synapse in future neuromorphic circuits. A train of identical programming pulses was chosen because of its ease of implementation as an efficient and simple programming algorithm to emulate the strength change observed in biological synapses. With this algorithm we demonstrate that the conductance of the device can be both gradually increased and gradually decreased, provided an accurate choice of pulse amplitude and time width is made.

The retention behavior of HfO2-based resistive switching memory cells (REAM) is characterized as a function of Al doping concentration, which was previously reported to be a viable method for the improvement of the switching uniformity. While the low resistance state (LRS) does not exhibit any major variation up to 10(6) s for all the tested devices, two retention loss mechanisms can be identified for the high resistance state (HRS). The main HRS trend follows a temperature-activated gradual decrease of the resistance, which also depends on the doping concentration. In addition, tail bits of the population distribution show a very fast retention loss process that strongly depends on the doping concentration.

Block copolymer-based templates can be exploited for the fabrication of ordered arrays of metal nanoparticles (NPs) with a diameter down to a few nanometers. In order to develop this technique on metal oxide substrates, we studied the self-assembly of polymeric templates directly on the HfO2 surface. Using a random copolymer neutralization layer, we obtained an effective HfO2 surface neutralization, while the effects of surface cleaning and annealing temperature were carefully examined. Varying the block copolymer molecular weight, we produced regular nanoporous templates with feature size variable between 10 and 30 nm and a density up to 1.5 x 1011 cm(-2). With the adoption of a pattern transfer process, we produced ordered arrays of Pt and Pt/Ti NPs with diameters of 12, 21 and 29 nm and a constant size dispersion (sigma) of 2.5 nm. For the smallest template adopted, the NP diameter is significantly lower than the original template dimension. In this specific configuration, the granularity of the deposited film probably influences the pattern transfer process and very small NPs of 12 nm were achieved without a significant broadening of the size distribution.

Bipolar resistive switching memories based on metal oxides offer a great potential in terms of simple process integration, memory performance, and scalability. In view of ultrahigh density memory applications, a reduced device size is not the only requirement, as the distance between different devices is a key parameter. By exploiting a bottom-up fabrication approach based on block copolymer self-assembling, we obtained the parallel production of bilayer Pt/Ti top electrodes arranged in periodic arrays over the HfO2/TiN surface, building memory devices with a diameter of 28 nm and a density of 5 × 1010 devices/cm2. For an electrical characterization, the sharp conducting tip of an atomic force microscope was adopted for a selective addressing of the nanodevices. The presence of devices showing high conductance in the initial state was directly connected with scattered leakage current paths in the bare oxide film, while with bipolar voltage operations we obtained reversible set/reset transitions irrespective of the conductance variability in the initial state. Finally, we disclosed a scalability limit for ultrahigh density memory arrays based on continuous HfO2 thin films, in which a cross-talk between distinct nanodevices can occur during both set and reset transitions.

For the fabrication of n-type metal-oxide-semiconductor field-effect transistor based on high mobility III-V compound semiconductors as channel materials, a major requirement is the integration of high quality gate oxides on top of the III-V substrates. A detailed knowledge of the interface between the oxide layer and the substrate is mandatory to assess the relevance of interdiffusion and related defects, which are detrimental. Here we grow high dielectric constant (k) Al:MO2 (M = Hf, Zr) gate materials on In0.53Ga0.47As substrates by atomic layer deposition, after an Al2O3 pre-treatment based on trimethylaluminumis performed to properly passivate the substrate surface. Time of flight secondary ion mass spectrometry depth profiles reveal not only the film integrity and the chemical composition of the high-k oxide but also well elucidate the effect of the Al2O3 pre-treatment on Al:MO2/In0.53Ga0.47As interface. Even though the chemical profile is well defined in both cases, a broader interface is detected for Al:ZrO2. X-ray photoemission spectroscopy evidenced the presence of As3+ states in Al:ZrO2 only. Accordingly, preliminary capacitance-voltage measurements point out to a better field effect modulation in the capacitor incorporating Al:HfO2. Based on the above considerations Al:HfO2 looks as a preferred candidate with respect to Al:ZrO2 for the integration on top of In0.53Ga0.47As substrates.

In this paper, the trapping properties of HfO2-based charge-trap cells have been extensively studied by means of a synergic use of material analysis, electrical characterization, and electrical and atomistic modeling. We assessed the impact of process conditions [i.e., postdeposition annealing (PDA)] on the material structure and the trapping behavior of the fabricated gate-stacks. Furthermore, we present reliable models for the HfO2 structure and for the defects responsible for the electron trapping. We found that HfO2 has a trap density comparable with that of SiN that depends on the PDA temperature. The HfO2 traps are shallower in energy than SiN traps, but retention of memory cells is still sufficient, also because of a slightly larger electron affinity and a larger permittivity than SiN that allows thicker layers while preserving the equivalent oxide thickness of the gate-stack.

Al:HfO2 is grown on III-V compound substrates by atomic layer deposition after an in situ trimethylaluminum-based preconditioning treatment of the III-V surface. After post-deposition rapid thermal annealing at 700 degrees C, the cubic/tetragonal crystalline phase is stabilized and the chemical composition of the stack is preserved. The observed structural evolution of Al:HfO2 on preconditioned III-V substrates shows that the in-diffusion of semiconductor species from the substrate through the oxide is inhibited. Al-induced stabilization of the Al:HfO2 crystal polymorphs up to 700 degrees C can be used as a permittivity booster methodology with possibly important implications in the stack scaling issues of high-mobility III-V based logic applications.

The process of the formation and disruption of nanometric conductive filaments in a HfO2/TiN structure is investigated by conductive atomic force microscopy. The preforming state evidences nonhomogeneous conduction at high fields through conductive paths, which are associated with pre-existing defects and develop into conductive filaments with a forming procedure. The disruption of the same filaments is demonstrated as well, according to a bipolar operation. In addition, the conductive tip of the microscopy is exploited to perform electrical operations on single conductive spots, which evidences that neighboring conductive filaments are not electrically independent. We propose a picture that describes the evolution of the shape of the conductive filaments in the processes of their formation and disruption, which involves the development of conductive branches from a common root; this root resides in the pre-existing defects that lay at the HfO2/TiN interface.