Silicon-based digital electronics have evolved over decades through an aggressive scaling process following Moore's law with increasingly complex device structures. Simultaneously, large-area electronics have continued to rely on the same field-effect transistor structure with minimal evolution. This limitation has resulted in less than ideal circuit designs, with increased complexity to account for shortcomings in material properties and process control. At present, this situation is holding back the development of novel systems required for printed and flexible electronic applications beyond the Internet of Things. In this work we demonstrate the opportunity offered by the source-gated transistor's unique properties for low-cost, highly functional large-area applications in two extremely compact circuit blocks. Polysilicon common-source amplifiers show 49 dB gain, the highest reported for a two-transistor unipolar circuit. Current mirrors fabricated in polysilicon and InGaZnO have, in addition to excellent current copying performance, the ability to control the temperature dependence (degrees of positive, neutral or negative) of output current solely by choice of relative transistor geometry, giving further flexibility to the design engineer. Application examples are proposed, including local amplification of sensor output for improved signal integrity, as well as temperature-regulated delay stages and timing circuits for homeostatic operation in future wearables. Numerous applications will benefit from these highly competitive compact circuit designs with robust performance, improved energy efficiency and tolerance to geometrical variations: sensor front-ends, temperature sensors, pixel drivers, bias analog blocks and high-gain amplifiers.

Different approaches to fabricate low-temperature polycrystalline silicon (LTPS) thin film transistors (TFTs) on polymer substrates are reviewed and the two main routes are discussed: (1) standard fabrication of LTPS TFTs on glass substrates followed by a transfer process of the devices on the polymeric substrate; (2) direct fabrication of the devices on the polymeric substrate. Among the different techniques we have described in more detail the process we have recently developed for the fabrication of LTPS TFTs directly on ultra-thin polyimide (PI) substrate. LTPS TFT technology is particularly suited for high performance flexible electronics applications, due to the excellent device characteristics, good electrical stability and CMOS technology. Flexible display application remains the most attractive application for LTPS technology, especially for AMOLED displays, where device stability and the possibility to integrate the driving circuits make LTPS technology superior to all the other competitive TFT technologies. Among the other applications, particularly promising is also the application to flexible smart sensors, where integration of a front-end electronics is essential. Some examples of flexible gas sensors and pressure sensors, integrated with simple readout electronics based on LTPS TFTs and fabricated on ultra-thin PI substrate, are presented. © 2012 Elsevier Ltd.

We present a home-built high-vacuum system for performing organic semiconductor thin-film growth and its electrical characterization during deposition (real-time) or after deposition (in situ). Since the environment conditions remain unchanged during the deposition and electrical characterization process, a direct correlation between growth mode and electrical properties of thin film can be obtained. Deposition rate and substrate temperature can be systematically set in the range 0.1-10 ML/min and RT-150 oC, respectively. The sample-holder configuration allows the simultaneous electrical monitoring of up to five organic thin-film transistors (OTFTs). The OTFTs parameters such as charge carrier mobility ?, threshold voltage VTH, and the on-off ratio Ion/Ioff are studied as a function of the semiconductor thickness, with a submonolayer accuracy. Design, operation, and performance of the setup are detailed. As an example, the in situ and real-time electrical characterization of pentacene TFTs is reported.

In this work we present a study of the electrical stability of self-aligned p-channel TFTs fabricated using excimer laser annealing. The electrical stability was tested performing bias stress experiments and accelerated stability tests and we found that the device characteristics were seriously degraded upon application of large negative gate bias. From extensive analysis of the phenomenon through numerical simulations, we found that the device degradation could be perfectly reproduced by positive charge injection into the gate oxide in narrow (300-400 nm) regions at the edges of the gate, near the source and drain contacts. From the present results we conclude that the observed degradation is closely related to the residual damage, induced by ion implantation, present in the gate oxide near the gate edges. © 2007 Elsevier Ltd. All rights reserved.

In this work we show a new low-temperature polycrystalline silicon (LTPS) thin film transistor (TFT) fabrication process on polyimide (PI) layers. The PI is spun on Si-wafer used as rigid carrier, thus overcoming difficulties in handling flexible freestanding plastic substrates, eliminating the problem of plastic shrinkage with high temperature processing and allowing the use of standard semiconductor equipment. LTPS TFTs are fabricated according to a conventional non self-aligned process, with source/drain contacts formed by deposition of a highly doped Si-layer and patterned by a selective wet-etching. Laser annealing is performed providing simultaneous dopant activation and crystallization of the active layer. The maximum process temperature is kept below 350 °C. After LTPS TFTs fabrication, the PI layer is mechanically released from the rigid carrier, which can be re-used for a new fabrication process. The devices exhibit good electrical characteristics with field effect mobility up to 50 cm2/V s. Analysis of electrical stability and characteristics in presence of mechanical stress is also shown.

The introduction of excimer laser crystallization ELC. techniques in the fabrication of polysilicon thin-film transistors TFTs. has produced a tremendous improvement in the device characteristics. When the Super Lateral Growth SLG. mechanism is triggered, large )1 mm. grains are formed and this crystallization regime appears very attractive from the device fabrication point of view. In fact, using SLG-polysilicon active layers high performance electron field-effect mobility)300 cm2rV s. TFTs can be obtained and a detailed analysis of the electrical characteristics of such devices is presented. However, the SLG mechanism has a very narrow energy density window and, consequently, highly uniform beam profiles and pulse-to-pulse stability better than 2% are required. This implies that standard ELC-process is technologically quite critical and several approaches have been proposed to improve the process uniformity. Among these we will discuss three main techniques: 1. the use of opportunely semi-gaussian. profiled beams; 2. the combined use of Solid Phase Crystallization SPC. and ELC techniques; 3. control of the lateral growth. In particular, we present a novel technique to control the lateral growth, based on a two-pass ELC-process. The proposed technique can be rather attractive for polysilicon TFT fabrication, allowing a precise grain location control through the mask geometry. and being characterized by a few 3-5. laser shots process and wide energy density windows.